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Message-ID: <4F182C55.7040305@zytor.com>
Date:	Thu, 19 Jan 2012 06:44:37 -0800
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Jan Beulich <JBeulich@...e.com>
CC:	mingo@...e.hu, "eric.dumazet@...il.com" <eric.dumazet@...il.com>,
	tglx@...utronix.de, luca@...a-barbieri.com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] ix86: atomic64 assembly improvements

On 01/19/2012 01:18 AM, Jan Beulich wrote:
> 
> But the code is supposed to be correct even when caches are disabled
> (in which case LOCK# will continue to be used even on modern CPUs),
> and this case clearly isn't covered by the current implementation. It
> may be a good idea to adjust the patch description accordingly, but I
> see no reason to change the patch itself.
> 

It doesn't have anything to do with caches on or off.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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