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Message-ID: <20120127103110.2a4d667f@jbarnes-desktop>
Date: Fri, 27 Jan 2012 10:31:10 -0800
From: Jesse Barnes <jbarnes@...tuousgeek.org>
To: Seth Heasley <seth.heasley@...el.com>
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
james.d.ralston@...el.com
Subject: Re: [PATCH 6/6] pci: irq and pci_ids patch for Intel Lynx Point
DeviceIDs
On Mon, 23 Jan 2012 16:46:24 -0800
Seth Heasley <seth.heasley@...el.com> wrote:
> This patch adds the LPC Controller DeviceIDs for the Intel Lynx Point PCH.
>
> Signed-off-by: Seth Heasley <seth.heasley@...el.com>
> ---
> arch/x86/pci/irq.c | 4 +++-
> include/linux/pci_ids.h | 2 ++
> 2 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
> index 372e9b8..22468b6 100644
> --- a/arch/x86/pci/irq.c
> +++ b/arch/x86/pci/irq.c
> @@ -604,7 +604,9 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
> || (device >= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN &&
> device <= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX)
> || (device >= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN &&
> - device <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX)) {
> + device <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX)
> + || (device >= PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC_MIN &&
> + device <= PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC_MAX)) {
> r->name = "PIIX/ICH";
> r->get = pirq_piix_get;
> r->set = pirq_piix_set;
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 31d77af..6a0359a 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2800,6 +2800,8 @@
> #define PCI_DEVICE_ID_INTEL_82454NX 0x84cb
> #define PCI_DEVICE_ID_INTEL_84460GX 0x84ea
> #define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500
> +#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC_MIN 0x8c40
> +#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC_MAX 0x8c5f
> #define PCI_DEVICE_ID_INTEL_IXP2800 0x9004
> #define PCI_DEVICE_ID_INTEL_S21152BB 0xb152
>
Seems we add every new GMCH or PCH anyway, why not just use the piix
routines for any unknown (therefore presumably new) Intel PCH device?
--
Jesse Barnes, Intel Open Source Technology Center
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