linux-kernel - Re: [PATCH] Clear previous interrupts after fifo is disabled

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Message-ID: <20120228102337.GF18045@n2100.arm.linux.org.uk>
Date:	Tue, 28 Feb 2012 10:23:37 +0000
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Chanho Min <chanho0207@...il.com>
Cc:	Alan Cox <alan@...ux.intel.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Linus Walleij <linus.walleij@...aro.org>,
	Shreshtha Kumar Sahu <shreshthakumar.sahu@...ricsson.com>,
	"Kim, Jong-Sung" <neidhard.kim@....com>,
	linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org
Subject: Re: [PATCH] Clear previous interrupts after fifo is disabled

On Tue, Feb 28, 2012 at 06:46:12PM +0900, Chanho Min wrote:
> > Because the flags are manipulated to give the illusion of a one byte
> > FIFO, as stated in the TRM.
> Yes. It is the problem that rx interrupt is pended with this status as
> I mentioned.

Which is why my patch explicitly clears the receive interrupt status
before requesting the interrupt.  Have you read my patch?
 
> > And we don't set the mask register to 1 until later.
> In the last part of startup, set to 1. Interrupt can be occurred just
> after it.
> 
> uap->im = UART011_RTIM;
> if (!pl011_dma_rx_running(uap))
>  uap->im |= UART011_RXIM;
>  writew(uap->im, uap->port.membase + UART011_IMSC);
> 
> > But we want to do the transmit interrupt provocation with the FIFO disabled.
> I know. It's test only.

Wrong, it's fundamental to the UARTs operation.
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