linux-kernel - [tip:x86/urgent] x86: Use correct byte-sized register constraint in _

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Message-ID: <tip-8c91c5325e107ec17e40a59a47c6517387d64eb7@git.kernel.org>
Date:	Fri, 6 Apr 2012 09:53:39 -0700
From:	"tip-bot for H. Peter Anvin" <hpa@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	jeremy@...p.org, linux-kernel@...r.kernel.org, hpa@...or.com,
	mingo@...nel.org, leigh123linux@...glemail.com,
	treitmayr@...base.at, tglx@...utronix.de
Subject: [tip:x86/urgent] x86:
  Use correct byte-sized register constraint in __add()

Commit-ID:  8c91c5325e107ec17e40a59a47c6517387d64eb7
Gitweb:     http://git.kernel.org/tip/8c91c5325e107ec17e40a59a47c6517387d64eb7
Author:     H. Peter Anvin <hpa@...or.com>
AuthorDate: Fri, 6 Apr 2012 09:30:57 -0700
Committer:  H. Peter Anvin <hpa@...or.com>
CommitDate: Fri, 6 Apr 2012 09:40:07 -0700

x86: Use correct byte-sized register constraint in __add()

Similar to:

 2ca052a x86: Use correct byte-sized register constraint in __xchg_op()

... the __add() macro also needs to use a "q" constraint in the
byte-sized case, lest we try to generate an illegal register.

Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
Signed-off-by: H. Peter Anvin <hpa@...or.com>
Cc: Jeremy Fitzhardinge <jeremy@...p.org>
Cc: Leigh Scott <leigh123linux@...glemail.com>
Cc: Thomas Reitmayr <treitmayr@...base.at>
Cc: <stable@...r.kernel.org> v3.3
---
 arch/x86/include/asm/cmpxchg.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index bc18d0e..99480e5 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -173,7 +173,7 @@ extern void __add_wrong_size(void)
 		switch (sizeof(*(ptr))) {				\
 		case __X86_CASE_B:					\
 			asm volatile (lock "addb %b1, %0\n"		\
-				      : "+m" (*(ptr)) : "ri" (inc)	\
+				      : "+m" (*(ptr)) : "qi" (inc)	\
 				      : "memory", "cc");		\
 			break;						\
 		case __X86_CASE_W:					\
--
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