linux-kernel - [tip:x86/urgent] x86: Use correct byte-sized register constraint in __xchg

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Message-ID: <tip-2ca052a3710fac208eee690faefdeb8bbd4586a1@git.kernel.org>
Date:	Fri, 6 Apr 2012 09:52:49 -0700
From:	tip-bot for Jeremy Fitzhardinge <jeremy@...p.org>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, jeremy@...p.org, hpa@...or.com,
	mingo@...nel.org, leigh123linux@...glemail.com,
	treitmayr@...base.at, tglx@...utronix.de
Subject: [tip:x86/urgent] x86:
  Use correct byte-sized register constraint in __xchg_op()

Commit-ID:  2ca052a3710fac208eee690faefdeb8bbd4586a1
Gitweb:     http://git.kernel.org/tip/2ca052a3710fac208eee690faefdeb8bbd4586a1
Author:     Jeremy Fitzhardinge <jeremy@...p.org>
AuthorDate: Mon, 2 Apr 2012 16:15:33 -0700
Committer:  H. Peter Anvin <hpa@...or.com>
CommitDate: Fri, 6 Apr 2012 09:39:39 -0700

x86: Use correct byte-sized register constraint in __xchg_op()

x86-64 can access the low half of any register, but i386 can only do
it with a subset of registers.  'r' causes compilation failures on i386,
but 'q' expresses the constraint properly.

Signed-off-by: Jeremy Fitzhardinge <jeremy@...p.org>
Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
Reported-by: Leigh Scott <leigh123linux@...glemail.com>
Tested-by: Thomas Reitmayr <treitmayr@...base.at>
Signed-off-by: H. Peter Anvin <hpa@...or.com>
Cc: <stable@...r.kernel.org> v3.3
---
 arch/x86/include/asm/cmpxchg.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index b3b7332..bc18d0e 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
 		switch (sizeof(*(ptr))) {				\
 		case __X86_CASE_B:					\
 			asm volatile (lock #op "b %b0, %1\n"		\
-				      : "+r" (__ret), "+m" (*(ptr))	\
+				      : "+q" (__ret), "+m" (*(ptr))	\
 				      : : "memory", "cc");		\
 			break;						\
 		case __X86_CASE_W:					\
--
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