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Message-ID: <20120507160339.GK18810@erda.amd.com>
Date: Mon, 7 May 2012 18:03:39 +0200
From: Robert Richter <robert.richter@....com>
To: Peter Zijlstra <peterz@...radead.org>
CC: Arnaldo Carvalho de Melo <acme@...hat.com>,
Ingo Molnar <mingo@...nel.org>,
Stephane Eranian <eranian@...gle.com>,
Jiri Olsa <jolsa@...hat.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/7] perf/x86-ibs: Add support for IBS pseudo events
On 07.05.12 17:15:18, Peter Zijlstra wrote:
> On Mon, 2012-05-07 at 16:47 +0200, Robert Richter wrote:
> > > Who again wasn't decoding anything in perf_event_attr:config* ?
> >
> > attr:config is one of the ibs control msrs comparable with perfctr's
> > evntsel msr:
> >
> > MSRC001_1030 IBS Fetch Control Register (IbsFetchCtl)
> > MSRC001_1033 IBS Execution Control Register (IbsOpCtl)
>
> You missed reading a '*', even so:
>
> > There are some options (randomisation, cycle/micro-op counting) but
> > usually it is null since the period is encoded in attr:period. But ibs
> > could be setup by an application using attr:config only which then
> > passes the value directly to the ctl msr.
>
> PMU_FORMAT_ATTR(IbsFetchMaxCnt, "config:0-15" );
> PMU_FORMAT_ATTR(IbsFetchCnt, "config:16-31" );
> PMU_FORMAT_ATTR(IbsFetchVal, "config:49" );
> PMU_FORMAT_ATTR(IbsRandEn, "config:57" );
>
> and
>
> PMU_FORMAT_ATTR(IbsOpMaxCnt, "config:0-15" );
> PMU_FORMAT_ATTR(IbsOpVal, "config:18" );
> PMU_FORMAT_ATTR(IbsOpCntCtl, "config:19" ); /* subject to ibs_caps */
>
> Are the writable bitfields of those two MSRs resp.
>
> This patch adds:
>
> PMU_FORMAT_ATTR(IbsFilter0Idx, "config1:0-7" );
> PMU_FORMAT_ATTR(IbsFilter0Type, "config1:12-15" );
> PMU_FORMAT_ATTR(IbsFilter0Mask, "config1:16-23" );
> PMU_FORMAT_ATTR(IbsFilter0Match,"config1:24-31" );
> PMU_FORMAT_ATTR(IbsFilter0Any, "config1:16-31" );
>
Yes, let's take this format specification for config and drop kernel
side filtering in config[12].
Passing options like IbsRandEn was another open item. This is a nice
solution for this.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
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