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Message-ID: <4FAC619B.1040305@intel.com>
Date:	Fri, 11 May 2012 08:47:23 +0800
From:	Alex Shi <alex.shi@...el.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
CC:	rob@...dley.net, tglx@...utronix.de, mingo@...hat.com,
	hpa@...or.com, arnd@...db.de, rostedt@...dmis.org,
	fweisbec@...il.com, jeremy@...p.org, gregkh@...uxfoundation.org,
	borislav.petkov@....com, riel@...hat.com, luto@....edu,
	avi@...hat.com, len.brown@...el.com, dhowells@...hat.com,
	fenghua.yu@...el.com, ak@...ux.intel.com, cpw@....com,
	steiner@....com, akpm@...ux-foundation.org, penberg@...nel.org,
	hughd@...gle.com, rientjes@...gle.com,
	kosaki.motohiro@...fujitsu.com, n-horiguchi@...jp.nec.com,
	paul.gortmaker@...driver.com, trenn@...e.de, tj@...nel.org,
	oleg@...hat.com, axboe@...nel.dk, kamezawa.hiroyu@...fujitsu.com,
	viro@...iv.linux.org.uk, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 5/7] x86/tlb: add tlb flush all factor for specific
 CPU

On 05/10/2012 05:35 PM, Peter Zijlstra wrote:

> On Thu, 2012-05-10 at 13:00 +0800, Alex Shi wrote:
>> +       case 0x60f: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
>> +               tlb_flushall_factor = -1;
>> +               break; 
> 
> Why not the 45nm Core2 chips?


Uh, I haven't this CPU in hands.
but the experience show same micro-architecture CPU has same results.
So, I am going to add it.

> 
> And where's the Core (model 14) "Yonah" gone?


no this type CPU in hands.

> 
> 
> 


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