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Message-ID: <4FAC61D3.8020007@intel.com>
Date:	Fri, 11 May 2012 08:48:19 +0800
From:	Alex Shi <alex.shi@...el.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
CC:	rob@...dley.net, tglx@...utronix.de, mingo@...hat.com,
	hpa@...or.com, arnd@...db.de, rostedt@...dmis.org,
	fweisbec@...il.com, jeremy@...p.org, gregkh@...uxfoundation.org,
	borislav.petkov@....com, riel@...hat.com, luto@....edu,
	avi@...hat.com, len.brown@...el.com, dhowells@...hat.com,
	fenghua.yu@...el.com, ak@...ux.intel.com, cpw@....com,
	steiner@....com, akpm@...ux-foundation.org, penberg@...nel.org,
	hughd@...gle.com, rientjes@...gle.com,
	kosaki.motohiro@...fujitsu.com, n-horiguchi@...jp.nec.com,
	paul.gortmaker@...driver.com, trenn@...e.de, tj@...nel.org,
	oleg@...hat.com, axboe@...nel.dk, kamezawa.hiroyu@...fujitsu.com,
	viro@...iv.linux.org.uk, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 5/7] x86/tlb: add tlb flush all factor for specific
 CPU

On 05/10/2012 05:37 PM, Peter Zijlstra wrote:

> On Thu, 2012-05-10 at 13:00 +0800, Alex Shi wrote:
>> +       case 0x62a: /* SandyBridge */
>> +       case 0x62d: /* SandyBridge, "Romely-EP" */
>> +               tlb_flushall_factor = 5;
>> +               break;
> 
> One would expect some IVB stuff here.. surely you have some.


I also hope I have. :(

> 
>> +       default:
>> +               tlb_flushall_factor = 6;
>> +       } 
> 
> 
> 


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