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Message-ID: <4FDB5107.3000308@linux.vnet.ibm.com>
Date: Fri, 15 Jun 2012 10:13:11 -0500
From: Seth Jennings <sjenning@...ux.vnet.ibm.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
CC: Minchan Kim <minchan@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Nitin Gupta <ngupta@...are.org>,
Dan Magenheimer <dan.magenheimer@...cle.com>,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Tejun Heo <tj@...nel.org>,
David Howells <dhowells@...hat.com>, x86@...nel.org,
Nick Piggin <npiggin@...il.com>
Subject: Re: [PATCH v2 3/3] x86: Support local_flush_tlb_kernel_range
On 05/17/2012 09:51 AM, Peter Zijlstra wrote:
> On Thu, 2012-05-17 at 17:11 +0900, Minchan Kim wrote:
>>> +++ b/arch/x86/include/asm/tlbflush.h
>>> @@ -172,4 +172,16 @@ static inline void flush_tlb_kernel_range(unsigned long start,
>>> flush_tlb_all();
>>> }
>>>
>>> +static inline void local_flush_tlb_kernel_range(unsigned long start,
>>> + unsigned long end)
>>> +{
>>> + if (cpu_has_invlpg) {
>>> + while (start < end) {
>>> + __flush_tlb_single(start);
>>> + start += PAGE_SIZE;
>>> + }
>>> + } else
>>> + local_flush_tlb();
>>> +}
>
>
> It would be much better if you wait for Alex Shi's patch to mature.
> doing the invlpg thing for ranges is not an unconditional win.
>From what I can tell Alex's patches have stalled. The last post was v6
on 5/17 and there wasn't a single reply to them afaict.
According to Alex's investigation of this "tipping point", it seems that
a good generic value is 8. In other words, on most x86 hardware, it is
cheaper to flush up to 8 tlb entries one by one rather than doing a
complete flush.
So we can do something like:
if (cpu_has_invlpg && (end - start)/PAGE_SIZE <= 8) {
while (start < end) {
Would this be acceptable?
Thanks,
Seth
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