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Message-ID: <7e925563-082b-468f-a7d8-829e819eeac0@default>
Date:	Fri, 15 Jun 2012 09:35:34 -0700 (PDT)
From:	Dan Magenheimer <dan.magenheimer@...cle.com>
To:	Seth Jennings <sjenning@...ux.vnet.ibm.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	Minchan Kim <minchan@...nel.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Nitin Gupta <ngupta@...are.org>, linux-kernel@...r.kernel.org,
	linux-mm@...ck.org, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>, Tejun Heo <tj@...nel.org>,
	David Howells <dhowells@...hat.com>, x86@...nel.org,
	Nick Piggin <npiggin@...il.com>,
	Konrad Rzeszutek Wilk <konrad@...nok.org>
Subject: RE: [PATCH v2 3/3] x86: Support local_flush_tlb_kernel_range

> From: Seth Jennings [mailto:sjenning@...ux.vnet.ibm.com]
> Sent: Friday, June 15, 2012 9:13 AM
> To: Peter Zijlstra
> Cc: Minchan Kim; Greg Kroah-Hartman; Nitin Gupta; Dan Magenheimer; linux-kernel@...r.kernel.org;
> linux-mm@...ck.org; Thomas Gleixner; Ingo Molnar; Tejun Heo; David Howells; x86@...nel.org; Nick
> Piggin
> Subject: Re: [PATCH v2 3/3] x86: Support local_flush_tlb_kernel_range
> 
> On 05/17/2012 09:51 AM, Peter Zijlstra wrote:
> 
> > On Thu, 2012-05-17 at 17:11 +0900, Minchan Kim wrote:
> >>> +++ b/arch/x86/include/asm/tlbflush.h
> >>> @@ -172,4 +172,16 @@ static inline void flush_tlb_kernel_range(unsigned long start,
> >>>       flush_tlb_all();
> >>>  }
> >>>
> >>> +static inline void local_flush_tlb_kernel_range(unsigned long start,
> >>> +             unsigned long end)
> >>> +{
> >>> +     if (cpu_has_invlpg) {
> >>> +             while (start < end) {
> >>> +                     __flush_tlb_single(start);
> >>> +                     start += PAGE_SIZE;
> >>> +             }
> >>> +     } else
> >>> +             local_flush_tlb();
> >>> +}
> >
> > It would be much better if you wait for Alex Shi's patch to mature.
> > doing the invlpg thing for ranges is not an unconditional win.
> 
> From what I can tell Alex's patches have stalled.  The last post was v6
> on 5/17 and there wasn't a single reply to them afaict.
> 
> According to Alex's investigation of this "tipping point", it seems that
> a good generic value is 8.  In other words, on most x86 hardware, it is
> cheaper to flush up to 8 tlb entries one by one rather than doing a
> complete flush.
> 
> So we can do something like:
> 
>      if (cpu_has_invlpg && (end - start)/PAGE_SIZE <= 8) {
>              while (start < end) {
> 
> Would this be acceptable?

Hey Seth, Nitin --

After more work digging around zsmalloc and zbud, I really think
this TLB flushing, as well as the "page pair mapping" code can be
completely eliminated IFF zsmalloc is limited to items PAGE_SIZE or
less.  Since this is already true of zram (and in-tree zcache), and
zsmalloc currently has no other users, I think you should seriously
consider limiting zsmalloc in that way, or possibly splitting out
one version of zsmalloc which handles items PAGE_SIZE or less,
and a second version that can handle larger items but has (AFAIK)
no users.

If you consider it an option to have (a version of) zsmalloc
limited to items PAGE_SIZE or less, let me know and we can
get into the details.

Thanks,
Dan
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