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Date:	Mon, 18 Jun 2012 17:56:26 +0300
From:	"Michael S. Tsirkin" <mst@...hat.com>
To:	Avi Kivity <avi@...hat.com>
Cc:	x86@...nel.org, kvm@...r.kernel.org,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	Marcelo Tosatti <mtosatti@...hat.com>, gleb@...hat.com,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCHv7 5/8] kvm: eoi msi documentation

On Mon, Jun 18, 2012 at 05:20:01PM +0300, Avi Kivity wrote:
> On 06/14/2012 04:53 PM, Michael S. Tsirkin wrote:
> > Document the new EOI MSR. Couldn't decide whether this change belongs
> > conceptually on guest or host side, so a separate patch.
> > 
> > Signed-off-by: Michael S. Tsirkin <mst@...hat.com>
> > ---
> >  Documentation/virtual/kvm/msr.txt | 32 ++++++++++++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> > 
> > diff --git a/Documentation/virtual/kvm/msr.txt b/Documentation/virtual/kvm/msr.txt
> > index 96b41bd..6ae5a85 100644
> > --- a/Documentation/virtual/kvm/msr.txt
> > +++ b/Documentation/virtual/kvm/msr.txt
> > @@ -223,3 +223,35 @@ MSR_KVM_STEAL_TIME: 0x4b564d03
> >  		steal: the amount of time in which this vCPU did not run, in
> >  		nanoseconds. Time during which the vcpu is idle, will not be
> >  		reported as steal time.
> > +
> > +MSR_KVM_EOI_EN: 0x4b564d04
> > +	data: Bit 0 is 1 when PV end of interrupt is enabled on the vcpu; 0
> > +	when disabled.  When enabled, bits 63-1 hold 2-byte aligned physical address
> > +	of a 2 byte memory area which must be in guest RAM and must be zeroed.
> 
> 2 byte aligned means we must never access it on the host with a >2 byte
> instruction, or we risk touching unmapped memory.

Yes. So ... that's correct for any length.
The patch actually accesses a single byte only.

Could you clarify what you are saying here please?

> -- 
> error compiling committee.c: too many arguments to function
> 
--
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