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Message-ID: <20120718090727.GB25929@mudshark.cambridge.arm.com>
Date: Wed, 18 Jul 2012 10:07:27 +0100
From: Will Deacon <will.deacon@....com>
To: Jon Masters <jonathan@...masters.org>
Cc: Catalin Marinas <Catalin.Marinas@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH 08/36] AArch64: Kernel booting and initialisation
On Wed, Jul 18, 2012 at 07:57:47AM +0100, Jon Masters wrote:
> On 07/06/2012 05:05 PM, Catalin Marinas wrote:
>
> > +- CPU mode
> > + All forms of interrupts must be masked in PSTATE.DAIF (Debug, SError,
> > + IRQ and FIQ).
> > + The CPU must be in either EL2 (RECOMMENDED) or non-secure EL1.
>
> Even though this stuff is likely to be replaced with the result of some
> of the other standardization, I'd like it if you'd strongly consider
> removing the "or non-secure EL1". If you give an inch, someone will take
> a mile and build a system that enters other than in EL2. Or, something
> to the effect of "the highest non-secure exception level implemented"
> would be my preference if you don't want to specify.
The reason we allow kernels to boot at non-secure EL1 is because we require
that for booting Linux as a guest OS under a hypervisor.
> > diff --git a/arch/aarch64/include/asm/setup.h b/arch/aarch64/include/asm/setup.h
>
> > +#define COMMAND_LINE_SIZE 1024
>
> Suggest at least the same size as x86 (2048) for command line params, or
> we'll just be coming back later to change it :)
If you like, I'm not sure it really matters though -- plenty of
architectures are using <=512 for the limit.
Will
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