linux-kernel - linux-next: manual merge of the drm tree with the pci tree

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Date:	Sun, 22 Jul 2012 11:04:35 +1000
From:	Stephen Rothwell <sfr@...b.auug.org.au>
To:	Dave Airlie <airlied@...ux.ie>
Cc:	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Alex Williamson <alex.williamson@...hat.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>
Subject: linux-next: manual merge of the drm tree with the pci tree

Hi Dave,

Today's linux-next merge of the drm tree got a conflict in
include/linux/pci_regs.h between commit a0dee2ed0cdc ("PCI: misc pci_reg
additions") from the  tree and commit cdcac9cd7741 ("pci_regs: define
LNKSTA2 pcie cap + bits") from the drm tree.

Just context changes.  I fixed it up (see below) and can carry the fix as
necessary (though I suspect that we may not need both of
PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 and  PCI_EXP_LNKCAP2).
-- 
Cheers,
Stephen Rothwell                    sfr@...b.auug.org.au

diff --cc include/linux/pci_regs.h
index 53274bf,7f04132..0000000
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@@ -542,7 -521,11 +542,12 @@@
  #define  PCI_EXP_OBFF_MSGA_EN	0x2000	/* OBFF enable with Message type A */
  #define  PCI_EXP_OBFF_MSGB_EN	0x4000	/* OBFF enable with Message type B */
  #define  PCI_EXP_OBFF_WAKE_EN	0x6000	/* OBFF using WAKE# signaling */
 +#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2	44	/* v2 endpoints end here */
+ #define PCI_EXP_LNKCAP2		44	/* Link Capability 2 */
+ #define  PCI_EXP_LNKCAP2_SLS_2_5GB 0x01	/* Current Link Speed 2.5GT/s */
+ #define  PCI_EXP_LNKCAP2_SLS_5_0GB 0x02	/* Current Link Speed 5.0GT/s */
+ #define  PCI_EXP_LNKCAP2_SLS_8_0GB 0x04	/* Current Link Speed 8.0GT/s */
+ #define  PCI_EXP_LNKCAP2_CROSSLINK 0x100 /* Crosslink supported */
  #define PCI_EXP_LNKCTL2		48	/* Link Control 2 */
  #define PCI_EXP_SLTCTL2		56	/* Slot Control 2 */
  

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