linux-kernel - Re: [RFC 23/23] ARM: keystone: add switch over to high physical address range

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 24 Jul 2012 10:59:17 -0400
From:	Cyril Chemparathy <cyril@...com>
To:	Arnd Bergmann <arnd@...db.de>
CC:	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <nico@...aro.org>,
	<will.deacon@....com>, <catalin.marinas@....com>,
	Vitaly Andrianov <vitalya@...com>
Subject: Re: [RFC 23/23] ARM: keystone: add switch over to high physical address
 range

On 7/24/2012 10:39 AM, Arnd Bergmann wrote:
> On Tuesday 24 July 2012, Cyril Chemparathy wrote:
>> Keystone platforms have their physical memory mapped at an address outside the
>> 32-bit physical range.  A Keystone machine with 16G of RAM would find its
>> memory at 0x0800000000 - 0x0bffffffff.
>>
>> For boot purposes, the interconnect supports a limited alias of some of this
>> memory within the 32-bit addressable space (0x80000000 - 0xffffffff).  This
>> aliasing is implemented in hardware, and is not intended to be used much
>> beyond boot.  For instance, DMA coherence does not work when running out of
>> this aliased address space.
>>
>> Therefore, we've taken the approach of booting out of the low physical address
>> range, and subsequently we switch over to the high range once we're safely
>> inside machine specific territory.  This patch implements this switch over
>> mechanism, which involves rewiring the TTBRs and page tables to point to the
>> new physical address space.
>>
>> Signed-off-by: Vitaly Andrianov <vitalya@...com>
>> Signed-off-by: Cyril Chemparathy <cyril@...com>
>
> I think this needs some more explanations. Why is not not possible
> to use this the larger area from the start when we first enable
> paging?

By enable paging, I assume you refer to the head.S init.  For this the 
boot code needs to get the "real physical address" from somewhere 
instead of having to deduce it from the program counter.  We could do 
this by parsing DTB in the decompressor, and passing in a 64-bit physmem 
pointer into the kernel startup code.

We'd considered this approach (at least briefly), but then balked at (a) 
having to change the entry conditions into head.S code, and (b) baking 
in dependencies on the decompressor.

> Also, the code does not really look platform specific, so I could
> imagine that if you need it, other similar platforms will need the
> same thing, and it should be put into common code and enabled
> all the time when using LPAE.
>

Absolutely agreed.  Vitaly and I have been trying to work it out this 
way, and we hope to have something more common in the next version of 
this series.

> 	Arnd
>

-- 
Thanks
- Cyril
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/