linux-kernel - Re: [PATCH 3/5] x86: Only direct map addresses that are marked as E820

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Message-ID: <20120827191729.GB23135@jshin-Toonie>
Date:	Mon, 27 Aug 2012 14:17:30 -0500
From:	Jacob Shin <jacob.shin@....com>
To:	"H. Peter Anvin" <hpa@...or.com>
CC:	X86-ML <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>,
	Yinghai Lu <yinghai@...nel.org>, Tejun Heo <tj@...nel.org>,
	Dave Young <dyoung@...hat.com>,
	Chao Wang <chaowang@...hat.com>,
	Vivek Goyal <vgoyal@...hat.com>,
	Andreas Herrmann <andreas.herrmann3@....com>,
	Borislav Petkov <borislav.petkov@....com>
Subject: Re: [PATCH 3/5] x86: Only direct map addresses that are marked as
 E820_RAM

On Fri, Aug 24, 2012 at 09:21:18PM -0700, H. Peter Anvin wrote:
> On 08/24/2012 09:20 PM, Jacob Shin wrote:
> >>
> >>What is the benefit?
> >
> >So that in the case where we have E820_RAM right above 1MB, we don't
> >call init_memory_mapping twice, first on 0 ~ 1MB and then 1MB ~ something
> >
> >we only call it once. 0 ~ something.
> >
> 
> So what is the benefit?

if there is E820_RAM right above ISA region, then you get to initialize
0 ~ max_low_pfn in one big chunk, which results in some memory configurations
for more 2M or 1G page tables which means less space used for page tables.

im also worried about the case where that first call to init_memory_mapping
for 0 ~ 1MB, results in max_pfn_mapped = 1MB, and the next call to
init_memory_mapping is some large enough area, where we don't have enough
space under 1MB for all the page tables needed (maybe only 4K page tables
are supported or something).

-Jacob

> 
> 	-hpa
> 
> 
> -- 
> H. Peter Anvin, Intel Open Source Technology Center
> I work for Intel.  I don't speak on their behalf.
> 
> 

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