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Message-ID: <503BD556.8080406@zytor.com>
Date:	Mon, 27 Aug 2012 13:15:18 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Jacob Shin <jacob.shin@....com>
CC:	X86-ML <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>,
	Yinghai Lu <yinghai@...nel.org>, Tejun Heo <tj@...nel.org>,
	Dave Young <dyoung@...hat.com>,
	Chao Wang <chaowang@...hat.com>,
	Vivek Goyal <vgoyal@...hat.com>,
	Andreas Herrmann <andreas.herrmann3@....com>,
	Borislav Petkov <borislav.petkov@....com>
Subject: Re: [PATCH 3/5] x86: Only direct map addresses that are marked as
 E820_RAM

On 08/27/2012 12:17 PM, Jacob Shin wrote:
> 
> if there is E820_RAM right above ISA region, then you get to initialize
> 0 ~ max_low_pfn in one big chunk, which results in some memory configurations
> for more 2M or 1G page tables which means less space used for page tables.
> 

We need to be able to coalesce small page tables to large, anyway; there
are plenty of machines in the field who do small chunks.  I'm not too
worried about the legacy region being in 4K pages; it will be broken
into 4K pages anyway by the TLB.

Another thing is that we may want to map from the top down (on i386 at
least top of lowmem down); we don't want to fill low memory with page
tables because of devices with restricted DMA masks.

> im also worried about the case where that first call to init_memory_mapping
> for 0 ~ 1MB, results in max_pfn_mapped = 1MB, and the next call to
> init_memory_mapping is some large enough area, where we don't have enough
> space under 1MB for all the page tables needed (maybe only 4K page tables
> are supported or something).

This is serious... I'm worrying that this might be a more general
problem.  In that case we probably need to handle the case where we have
filled up all the "free" memory with page tables for the next chunk;
however, in that case the answer is pretty simple: we can then allow the
memory already mapped to become page tables for the new chunk.

	-hpa
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