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Message-ID: <1347304838.26695.99.camel@sbsiddha-desk.sc.intel.com>
Date: Mon, 10 Sep 2012 12:20:37 -0700
From: Suresh Siddha <suresh.b.siddha@...el.com>
To: Jan Beulich <JBeulich@...e.com>
Cc: mingo@...e.hu, tglx@...utronix.de, hpa@...or.com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] x86: xor-block handling adjustments
On Mon, 2012-09-10 at 13:37 +0100, Jan Beulich wrote:
> 1: unify SSE-base xor-block routines
> 2: improve XMM register spill/fill
> 3: add alternative SSE implementation only prefetching once per 64-byte line
> 4: make virtualization friendly
>
> Signed-off-by: Jan Beulich <jbeulich@...e.com>
Jan, There are some relevant changes in tip/x86/fpu branch. Can you
please build your patches on top of that?
thanks,
suresh
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