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Message-Id: <505CA3D9020000780009D0DC@nat28.tlf.novell.com>
Date: Fri, 21 Sep 2012 16:28:57 +0100
From: "Jan Beulich" <JBeulich@...e.com>
To: "Suresh Siddha" <suresh.b.siddha@...el.com>
Cc: <mingo@...e.hu>, <tglx@...utronix.de>,
<linux-kernel@...r.kernel.org>, <hpa@...or.com>
Subject: Re: [PATCH 0/4] x86: xor-block handling adjustments
>>> On 10.09.12 at 21:20, Suresh Siddha <suresh.b.siddha@...el.com> wrote:
> On Mon, 2012-09-10 at 13:37 +0100, Jan Beulich wrote:
>> 1: unify SSE-base xor-block routines
>> 2: improve XMM register spill/fill
>> 3: add alternative SSE implementation only prefetching once per 64-byte line
>> 4: make virtualization friendly
>>
>> Signed-off-by: Jan Beulich <jbeulich@...e.com>
>
> Jan, There are some relevant changes in tip/x86/fpu branch. Can you
> please build your patches on top of that?
I see (albeit I'm puzzled by the patch there being just 2 days
old, yet your reply was sent over 10 days ago) - I'll probably
re-submit once I merged with the 3.7-rc-s, the more that I
still didn't get anything back from hpa regarding the stack
alignment compiler option he told me about, but use of which
I wasn't able to spot anywhere.
Jan
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