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Message-Id: <1347462990-29481-3-git-send-email-dsahern@gmail.com>
Date: Wed, 12 Sep 2012 09:16:29 -0600
From: David Ahern <dsahern@...il.com>
To: acme@...stprotocols.net, linux-kernel@...r.kernel.org,
peterz@...radead.org
Cc: David Ahern <dsahern@...il.com>, Ingo Molnar <mingo@...nel.org>,
Robert Richter <robert.richter@....com>,
Gleb Natapov <gleb@...hat.com>, Avi Kivity <avi@...hat.com>
Subject: [PATCH 2/3] perf: require exclude_guest to use PEBS - kernel side enforcement
From: Peter Zijlstra <peterz@...radead.org>
Per Peter:
"Intel PEBS in VT-x context uses the DS address as a guest linear address,
even though its programmed by the host as a host linear address. This
either results in guest memory corruption and or the hardware faulting and
'crashing' the virtual machine. Therefore we have to disable PEBS on VT-x
enter and re-enable on VT-x exit, enforcing a strict exclude_guest.
This patch enforces exclude_guest kernel side.
Signed-off-by: David Ahern <dsahern@...il.com>
Cc: Ingo Molnar <mingo@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Robert Richter <robert.richter@....com>
Cc: Gleb Natapov <gleb@...hat.com>
Cc: Avi Kivity <avi@...hat.com>
Link: https://lkml.org/lkml/2012/7/9/298
---
arch/x86/kernel/cpu/perf_event.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 915b876..4bc96c5 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -338,6 +338,9 @@ int x86_setup_perfctr(struct perf_event *event)
/* BTS is currently only allowed for user-mode. */
if (!attr->exclude_kernel)
return -EOPNOTSUPP;
+
+ if (!attr->exclude_guest)
+ return -EOPNOTSUPP;
}
hwc->config |= config;
@@ -380,6 +383,9 @@ int x86_pmu_hw_config(struct perf_event *event)
if (event->attr.precise_ip) {
int precise = 0;
+ if (!event->attr.exclude_guest)
+ return -EOPNOTSUPP;
+
/* Support for constant skid */
if (x86_pmu.pebs_active && !x86_pmu.pebs_broken) {
precise++;
--
1.7.10.1
--
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