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Date:	Wed, 12 Sep 2012 19:46:55 +0200
From:	Robert Richter <robert.richter@....com>
To:	David Ahern <dsahern@...il.com>
CC:	<acme@...stprotocols.net>, <linux-kernel@...r.kernel.org>,
	<peterz@...radead.org>, Ingo Molnar <mingo@...nel.org>,
	Gleb Natapov <gleb@...hat.com>, Avi Kivity <avi@...hat.com>
Subject: Re: [PATCH 1/3] perf tool: precise mode requires exclude_guest

On 12.09.12 09:16:28, David Ahern wrote:
> Summary of events per Peter:
> 
>   "Intel PEBS in VT-x context uses the DS address as a guest linear address,
>   even though its programmed by the host as a host linear address. This
>   either results in guest memory corruption and or the hardware faulting and
>   'crashing' the virtual machine.  Therefore we have to disable PEBS on VT-x
>   enter and re-enable on VT-x exit, enforcing a strict exclude_guest.
> 
>   AMB IBS does work but doesn't currently support exclude_* at all,
>   setting an exclude_* bit will make it fail."
> 
> This patch handles userspace perf command, setting the exclude_guest
> attribute if precise mode is requested, but only if a user has not
> specified a request for guest or host only profiling (G or H attribute).
> 
> Kernel side AMD currently ignores all exclude_* bits, so there is no impact
> to existing IBS code paths. Robert Richter has a patch where IBS code will
> return EINVAL if an exclude_* bit is set. When this goes in it means use
> of :p on AMD with IBS will first fail with EINVAL (because exclude_guest
> will be set). Then the existing fallback code within perf will unset
> exclude_guest and try again. The second attempt will succeed if the CPU
> supports IBS profiling.
> 
> Signed-off-by: David Ahern <dsahern@...il.com>
> Cc: Ingo Molnar <mingo@...nel.org>
> Cc: Peter Zijlstra <peterz@...radead.org>
> Cc: Robert Richter <robert.richter@....com>
> Cc: Gleb Natapov <gleb@...hat.com>
> Cc: Avi Kivity <avi@...hat.com>
> Link: https://lkml.org/lkml/2012/7/9/264
> ---
>  tools/perf/util/parse-events.c |    3 +++
>  1 file changed, 3 insertions(+)

Acked-by: Robert Richter <robert.richter@....com>

I tested the patch set with AMD IBS and it works fine.

-Robert

> 
> diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
> index 44afcf4..696cc7e 100644
> --- a/tools/perf/util/parse-events.c
> +++ b/tools/perf/util/parse-events.c
> @@ -694,6 +694,9 @@ static int get_event_modifier(struct event_modifier *mod, char *str,
>  			eH = 0;
>  		} else if (*str == 'p') {
>  			precise++;
> +			/* use of precise requires exclude_guest */
> +			if (!exclude_GH)
> +				eG = 1;
>  		} else
>  			break;
>  
> -- 
> 1.7.10.1
> 
> 

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

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