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Message-ID: <20120917142130.GH11266@suse.de>
Date:	Mon, 17 Sep 2012 15:21:30 +0100
From:	Mel Gorman <mgorman@...e.de>
To:	"Luck, Tony" <tony.luck@...el.com>
Cc:	qiuxishi <qiuxishi@...il.com>,
	"akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
	Jiang Liu <jiang.liu@...wei.com>,
	"qiuxishi@...wei.com" <qiuxishi@...wei.com>,
	"bessel.wang@...wei.com" <bessel.wang@...wei.com>,
	"wujianguo@...wei.com" <wujianguo@...wei.com>,
	"paul.gortmaker@...driver.com" <paul.gortmaker@...driver.com>,
	"kamezawa.hiroyu@...fujitsu.com" <kamezawa.hiroyu@...fujitsu.com>,
	"kosaki.motohiro@...fujitsu.com" <kosaki.motohiro@...fujitsu.com>,
	"rientjes@...gle.com" <rientjes@...gle.com>,
	Minchan Kim <minchan@...nel.org>,
	"linux-mm@...ck.org" <linux-mm@...ck.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Wen Congyang <wency@...fujitsu.com>
Subject: Re: [PATCH RESEND] memory hotplug: fix a double register section
 info bug

On Fri, Sep 14, 2012 at 04:24:32PM +0000, Luck, Tony wrote:
> > This is an unusual configuration but it's not unheard of. PPC64 in rare
> > (and usually broken) configurations can have one node span another. Tony
> > should know if such a configuration is normally allowed on Itanium or if
> > this should be considered a platform bug. Tony?
> 
> We definitely have platforms where the physical memory on node 0
> that we skipped to leave physical address space for PCI mem mapped
> devices gets tagged back at the very top of memory, after other nodes.
> 
> E.g. A 2-node system with 8G on each might look like this:
> 
> 0-2G RAM on node 0
> 2G-4G  PCI map space
> 4G-8G RAM on node 0
> 8G-16GRAM on node 1
> 16G-18G RAM on node 0
> 
> Is this the situation that we are talking about? Or something different?
> 

This is the type of situation we are talking about. The spanned range of
node 0 includes node 1. The patch needs another revision with a comment
explaining the situation included but otherwise the patch should be
fine.

-- 
Mel Gorman
SUSE Labs
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