[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20121023132039.GV16230@one.firstfloor.org>
Date: Tue, 23 Oct 2012 15:20:39 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Gleb Natapov <gleb@...hat.com>
Cc: Andi Kleen <andi@...stfloor.org>, a.p.zijlstra@...llo.nl,
x86@...nel.org, linux-kernel@...r.kernel.org, acme@...hat.com,
eranian@...gle.com, Andi Kleen <ak@...ux.intel.com>, avi@...hat.com
Subject: Re: [06/34] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v2
On Tue, Oct 23, 2012 at 03:05:09PM +0200, Gleb Natapov wrote:
> On Thu, Oct 18, 2012 at 11:19:14PM -0000, Andi Kleen wrote:
> > static inline u8 fixed_en_pmi(u64 ctrl, int idx)
> > @@ -400,7 +407,7 @@ int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
> > } else if ((pmc = get_gp_pmc(pmu, index, MSR_P6_EVNTSEL0))) {
> > if (data == pmc->eventsel)
> > return 0;
> > - if (!(data & 0xffffffff00200000ull)) {
> > + if (!(data & 0xfffffffc00200000ull)) {
> > reprogram_gp_counter(pmc, data);
> > return 0;
> > }
>
> Mask should depend on cpuid bits provided to a guest. SDM says TSX is
> available if CPUID.(EAX=7, ECX=0):RTM[bit 11]=1, or if
> CPUID.07H.EBX.HLE [bit 4] = 1, so we need to check for this in
> kvm_pmu_cpuid_update() and initialize mask accordingly.
I think it will still error out or do nothing.
So I have doubts the explicit check is worth it.
That should be near enough the hardware.
BTW does the PMU feature still work? I couldn't get it to work at all
with the latest kernel, just when I originally wrote it.
-Andi
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists