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Date:	Tue, 23 Oct 2012 15:22:40 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	Andi Kleen <andi@...stfloor.org>, x86@...nel.org,
	linux-kernel@...r.kernel.org, acme@...hat.com, eranian@...gle.com,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 14/34] perf, x86: Avoid checkpointed counters causing excessive TSX aborts

On Tue, Oct 23, 2012 at 03:03:43PM +0200, Peter Zijlstra wrote:
> On Thu, 2012-10-18 at 16:19 -0700, Andi Kleen wrote:
> > @@ -1079,6 +1079,17 @@ static void intel_pmu_enable_event(struct perf_event *event)
> >  int intel_pmu_save_and_restart(struct perf_event *event)
> >  {
> >         x86_perf_event_update(event);
> > +       /*
> > +        * For a checkpointed counter always reset back to 0.  This
> > +        * avoids a situation where the counter overflows, aborts the
> > +        * transaction and is then set back to shortly before the
> > +        * overflow, and overflows and aborts again.
> > +        */
> > +       if (event->hw.config & HSW_INTX_CHECKPOINTED) {
> 
> Would an unlikely() make sense there? Most events won't have this set.

Ok.

-Andi
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