linux-kernel - Re: [PATCH v3 04/11] clk: davinci

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Date:	Sun, 28 Oct 2012 20:26:57 +0100
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Murali Karicheri <m-karicheri2@...com>
Cc:	mturquette@...aro.org, arnd@...db.de, akpm@...ux-foundation.org,
	shawn.guo@...aro.org, rob.herring@...xeda.com,
	viresh.linux@...il.com, linux-kernel@...r.kernel.org,
	nsekhar@...com, khilman@...com, linux@....linux.org.uk,
	sshtylyov@...sta.com,
	davinci-linux-open-source@...ux.davincidsp.com,
	linux-arm-kernel@...ts.infradead.org, linux-keystone@...t.ti.com
Subject: Re: [PATCH v3 04/11] clk: davinci - add pll divider clock driver

On Thu, Oct 25, 2012 at 6:11 PM, Murali Karicheri <m-karicheri2@...com> wrote:

> pll dividers are present in the pll controller of DaVinci and Other
> SoCs that re-uses the same hardware IP. This has a enable bit for
> bypass the divider or enable the driver. This is a sub class of the
> clk-divider clock checks the enable bit to calculare the rate and
> invoke the recalculate() function of the clk-divider if enabled.
>
> Signed-off-by: Murali Karicheri <m-karicheri2@...com>

Looking good,
Acked-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij
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