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Message-ID: <874nld8ubf.fsf@sejong.aot.lge.com>
Date: Mon, 29 Oct 2012 19:08:04 +0900
From: Namhyung Kim <namhyung@...nel.org>
To: Andi Kleen <andi@...stfloor.org>
Cc: linux-kernel@...r.kernel.org, acme@...hat.com,
peterz@...radead.org, jolsa@...hat.com, eranian@...gle.com,
mingo@...nel.org, Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 01/33] perf, x86: Add PEBSv2 record support
Hi Andi,
On Fri, 26 Oct 2012 13:29:43 -0700, Andi Kleen wrote:
> From: Andi Kleen <ak@...ux.intel.com>
>
> Add support for the v2 PEBS format. It has a superset of the v1 PEBS
> fields, but has a longer record so we need to adjust the code paths.
>
> The main advantage is the new "EventingRip" support which directly
> gives the instruction, not off-by-one instruction. So with precise == 2
> we use that directly and don't try to use LBRs and walking basic blocks.
> This lowers the overhead significantly.
That means it can support precise == 3?
Thanks,
Namhyung
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