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Message-ID: <20121029101323.GR16230@one.firstfloor.org> Date: Mon, 29 Oct 2012 11:13:23 +0100 From: Andi Kleen <andi@...stfloor.org> To: Namhyung Kim <namhyung@...nel.org> Cc: Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org, acme@...hat.com, peterz@...radead.org, jolsa@...hat.com, eranian@...gle.com, mingo@...nel.org, Andi Kleen <ak@...ux.intel.com> Subject: Re: [PATCH 01/33] perf, x86: Add PEBSv2 record support On Mon, Oct 29, 2012 at 07:08:04PM +0900, Namhyung Kim wrote: > Hi Andi, > > On Fri, 26 Oct 2012 13:29:43 -0700, Andi Kleen wrote: > > From: Andi Kleen <ak@...ux.intel.com> > > > > Add support for the v2 PEBS format. It has a superset of the v1 PEBS > > fields, but has a longer record so we need to adjust the code paths. > > > > The main advantage is the new "EventingRip" support which directly > > gives the instruction, not off-by-one instruction. So with precise == 2 > > we use that directly and don't try to use LBRs and walking basic blocks. > > This lowers the overhead significantly. > > That means it can support precise == 3? No. It's still 2 I tried to introduced precise == 3 some time ago for PDIR, but it was rejected. -Andi -- ak@...ux.intel.com -- Speaking for myself only. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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