linux-kernel - Re: [PATCH 2/2] Documentation: add docs for 88pm80x dt

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Message-Id: <20121205225538.731E73E0E22@localhost>
Date:	Wed, 05 Dec 2012 22:55:38 +0000
From:	Grant Likely <grant.likely@...retlab.ca>
To:	Qing Xu <qingx@...vell.com>, qingx@...vell.com, rob@...dley.net,
	sameo@...ux.intel.com, haojian.zhuang@...il.com,
	rob.herring@...xeda.com, zhouqiao@...vell.com, cxie4@...vell.com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] Documentation: add docs for 88pm80x dt

On Wed,  5 Dec 2012 13:42:00 +0800, Qing Xu <qingx@...vell.com> wrote:
> From: Qing Xu <qingx@...vell.com>
> 
> Signed-off-by: Qing Xu <qingx@...vell.com>

No commit text?

This patch needs to be squashed together with the patch that changes the
driver. There is no value in separating them.

> ---
>  Documentation/devicetree/bindings/mfd/88pm80x.txt |   52 +++++++++++++++++++++
>  1 files changed, 52 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/mfd/88pm80x.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/88pm80x.txt b/Documentation/devicetree/bindings/mfd/88pm80x.txt
> new file mode 100644
> index 0000000..8a0ed07
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/88pm80x.txt
> @@ -0,0 +1,52 @@
> +* Marvell 88pm80x Power Management IC
> +
> +Required parent device properties:
> +- compatible : "marvell,88pm80x"
> +- reg : the I2C slave address for the 88pm80x chip
> +- interrupts : IRQ line for the 88pm80x chip
> +- interrupt-controller: describes the 88pm80x as an interrupt controller (has its own domain)
> +- #interrupt-cells : should be 1.
> +	- The cell is the 88pm80x local IRQ number
> +
> +Optional parent device properties:
> +- marvell,88pm80x-irqmode: inicates whether interrupt status is cleared by read
> +- marvell,88pm80x-poweraddr: 88pm80x are multi-chips solution. <reg> stores the I2C address
> +				of one chip, and this property stores the I2C address of
> +				power related chip.
> +- marvell,88pm80x-gpadcaddr: 88pm80x are multi-chips solution. <reg> stores the I2C address
> +				of one chip, and this property stores the I2C address of
> +				gpadc related chip.

If it is multichip, then I would expect either a separate node for each
chip and these properties use phandles (instead of i2c addresses) to
point to the other chip nodes.

Alternately, if the cluster is described using a single node, then you
can put all three i2c addresses into the 'reg' property.

g.
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