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Message-ID: <50C6C930.90206@in.ibm.com>
Date:	Tue, 11 Dec 2012 11:18:32 +0530
From:	"Suzuki K. Poulose" <suzuki@...ibm.com>
To:	benh@...nel.crashing.org, Kumar Gala <galak@...nel.crashing.org>
CC:	"Suzuki K. Poulose" <suzuki@...ibm.com>, bigeasy@...utronix.de,
	oleg@...hat.com, ananth@...ibm.com, srikar@...ux.vnet.ibm.com,
	peterz@...radead.org, linux-kernel@...r.kernel.org,
	linuxppc-dev@...abs.org, anton@...hat.com, mingo@...e.hu
Subject: Re: [PATCH v2 1/4] kprobes/powerpc: Do not disable External interrupts
 during single step

On 12/03/2012 08:37 PM, Suzuki K. Poulose wrote:
> From: Suzuki K. Poulose <suzuki@...ibm.com>
>
> External/Decrement exceptions have lower priority than the Debug Exception.
> So, we don't have to disable the External interrupts before a single step.
> However, on BookE, Critical Input Exception(CE) has higher priority than a
> Debug Exception. Hence we mask them.
>
> Signed-off-by: 	Suzuki K. Poulose <suzuki@...ibm.com>
> Cc:		Sebastian Andrzej Siewior <bigeasy@...utronix.de>
> Cc:		Ananth N Mavinakaynahalli <ananth@...ibm.com>
> Cc:		Kumar Gala <galak@...nel.crashing.org>
> Cc:		linuxppc-dev@...abs.org
> ---
>   arch/powerpc/kernel/kprobes.c |   10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
> index e88c643..4901b34 100644
> --- a/arch/powerpc/kernel/kprobes.c
> +++ b/arch/powerpc/kernel/kprobes.c
> @@ -104,13 +104,13 @@ void __kprobes arch_remove_kprobe(struct kprobe *p)
>
>   static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
>   {
> -	/* We turn off async exceptions to ensure that the single step will
> -	 * be for the instruction we have the kprobe on, if we dont its
> -	 * possible we'd get the single step reported for an exception handler
> -	 * like Decrementer or External Interrupt */
> -	regs->msr &= ~MSR_EE;
>   	regs->msr |= MSR_SINGLESTEP;
>   #ifdef CONFIG_PPC_ADV_DEBUG_REGS
> +	/*
> +	 * We turn off Critical Input Exception(CE) to ensure that the single
> +	 * step will be for the instruction we have the probe on; if we don't,
> +	 * it is possible we'd get the single step reported for CE.
> +	 */
>   	regs->msr &= ~MSR_CE;
>   	mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
>   #ifdef CONFIG_PPC_47x
>

Ben, Kumar,

Could you please review this patch ?


Thanks
Suzuki

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