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Message-Id: <20121213123755.db3d38128e0593a372ccf17f@canb.auug.org.au>
Date: Thu, 13 Dec 2012 12:37:55 +1100
From: Stephen Rothwell <sfr@...b.auug.org.au>
To: Artem Bityutskiy <dedekind1@...il.com>
Cc: linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
"Kumar, Anil" <anilkumar.v@...com>,
Grant Likely <grant.likely@...retlab.ca>,
Murali Karicheri <m-karicheri2@...com>
Subject: linux-next: manual merge of the l2-mtd tree with Linus' tree
Hi Artem,
Today's linux-next merge of the l2-mtd tree got a conflict in
Documentation/devicetree/bindings/arm/davinci/nand.txt between commit
fed16bba8726 ("mtd: nand: davinci: fix the binding documentation") from
Linus' tree and commit 192afdbfbc5c ("mtd: davinci: add support for
parition binding nodes") from the l2-mtd tree.
I fixed it up (maybe- see below) and can carry the fix as necessary (no
action is required).
--
Cheers,
Stephen Rothwell sfr@...b.auug.org.au
diff --cc Documentation/devicetree/bindings/arm/davinci/nand.txt
index 49fc7ad,4746452..0000000
--- a/Documentation/devicetree/bindings/arm/davinci/nand.txt
+++ b/Documentation/devicetree/bindings/arm/davinci/nand.txt
@@@ -23,16 -23,37 +23,24 @@@ Recommended properties
- ti,davinci-nand-buswidth: buswidth 8 or 16
- ti,davinci-nand-use-bbt: use flash based bad block table support.
+ nand device bindings may contain additional sub-nodes describing
+ partitions of the address space. See partition.txt for more detail.
+
-Example (enbw_cmc board):
-aemif@...00000 {
- compatible = "ti,davinci-aemif";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0x68000000 0x80000>;
- ranges = <2 0 0x60000000 0x02000000
- 3 0 0x62000000 0x02000000
- 4 0 0x64000000 0x02000000
- 5 0 0x66000000 0x02000000
- 6 0 0x68000000 0x02000000>;
- nand@3,0 {
- compatible = "ti,davinci-nand";
- reg = <3 0x0 0x807ff
- 6 0x0 0x8000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ti,davinci-chipselect = <1>;
- ti,davinci-mask-ale = <0>;
- ti,davinci-mask-cle = <0>;
- ti,davinci-mask-chipsel = <0>;
- ti,davinci-ecc-mode = "hw";
- ti,davinci-ecc-bits = <4>;
- ti,davinci-nand-use-bbt;
+Example(da850 EVM ):
+nand_cs3@...00000 {
+ compatible = "ti,davinci-nand";
+ reg = <0x62000000 0x807ff
+ 0x68000000 0x8000>;
+ ti,davinci-chipselect = <1>;
+ ti,davinci-mask-ale = <0>;
+ ti,davinci-mask-cle = <0>;
+ ti,davinci-mask-chipsel = <0>;
+ ti,davinci-ecc-mode = "hw";
+ ti,davinci-ecc-bits = <4>;
+ ti,davinci-nand-use-bbt;
+
- partition@...000 {
- label = "ubifs";
- reg = <0x180000 0x7e80000>;
- };
++ partition@...000 {
++ label = "ubifs";
++ reg = <0x180000 0x7e80000>;
+ };
};
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