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Message-ID: <50CF5327.6070205@antcom.de>
Date: Mon, 17 Dec 2012 18:15:19 +0100
From: Roland Stigge <stigge@...com.de>
To: Wolfgang Grandegger <wg@...ndegger.com>
CC: rmallon@...il.com, gregkh@...uxfoundation.org,
linus.walleij@...aro.org, broonie@...nsource.wolfsonmicro.com,
linux-kernel@...r.kernel.org, w.sang@...gutronix.de,
grant.likely@...retlab.ca, daniel-gl@....net, sr@...x.de,
plagnioj@...osoft.com, linux-arm-kernel@...ts.infradead.org,
highguy@...il.com
Subject: Re: [PATCH RESEND 0/6 v10] gpio: Add block GPIO
On 12/17/2012 05:28 PM, Wolfgang Grandegger wrote:
> On 12/17/2012 02:51 PM, Roland Stigge wrote:
>> Hi Wolfgang,
>>> And I guess Russell is right: If possible, we should write outputs
>>> simultaneously via ODSR (plus OWER/OWDR/OWSR) instead of separate set/clear.
>>>
>>> I wonder if we need to save/restore the state of OWSR at every write
>>> operation or if we need/can cache it. Assuming that block GPIO are the
>>> only code in the kernel that manipulates ODSR.
>>
>> Can you please test the following:
>>
>> +static void at91_gpiolib_set_block(struct gpio_chip *chip, unsigned long mask, unsigned long val)
>> +{
>> + struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
>> + void __iomem *pio = at91_gpio->regbase;
>> +
>> + __raw_writel(~mask, pio + PIO_OWDR);
>
> This would also disable normal GPIOs configured for output! From the
> manual I understand that if the pin is configured for output, we could
> either use PIO_SODR/PIO_CODR to set/clear the bits individually or
> PIO_ODSR for synchronous data output. But than we need to care about the
> non-block GPIO outputs as well... requiring a read-modify-write cycle :(.
>From the manual, I read about OWER: "Enables writing PIO_ODSR for the
I/O line" (analogous for OWDR). Would interpret this as affecting ODSR
(for block GPIO) but not SODR/CODR (as currently with single GPIOs).
Have you tried? ;-)
Thanks in advance,
Roland
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