linux-kernel - Re: [PATCH RESEND 0/6 v10] gpio: Add block GPIO

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <50CF584E.1040601@grandegger.com>
Date:	Mon, 17 Dec 2012 18:37:18 +0100
From:	Wolfgang Grandegger <wg@...ndegger.com>
To:	Roland Stigge <stigge@...com.de>
CC:	rmallon@...il.com, gregkh@...uxfoundation.org,
	linus.walleij@...aro.org, broonie@...nsource.wolfsonmicro.com,
	w.sang@...gutronix.de, linux-kernel@...r.kernel.org,
	grant.likely@...retlab.ca, daniel-gl@....net, sr@...x.de,
	plagnioj@...osoft.com, linux-arm-kernel@...ts.infradead.org,
	highguy@...il.com
Subject: Re: [PATCH RESEND 0/6 v10] gpio: Add block GPIO

On 12/17/2012 06:15 PM, Roland Stigge wrote:
> On 12/17/2012 05:28 PM, Wolfgang Grandegger wrote:
>> On 12/17/2012 02:51 PM, Roland Stigge wrote:
>>> Hi Wolfgang,
>>>> And I guess Russell is right: If possible, we should write outputs
>>>> simultaneously via ODSR (plus OWER/OWDR/OWSR) instead of separate set/clear.
>>>>
>>>> I wonder if we need to save/restore the state of OWSR at every write
>>>> operation or if we need/can cache it. Assuming that block GPIO are the
>>>> only code in the kernel that manipulates ODSR.
>>>
>>> Can you please test the following:
>>>
>>> +static void at91_gpiolib_set_block(struct gpio_chip *chip, unsigned long mask, unsigned long val)
>>> +{
>>> +       struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
>>> +       void __iomem *pio = at91_gpio->regbase;
>>> +
>>> +       __raw_writel(~mask, pio + PIO_OWDR);
>>
>> This would also disable normal GPIOs configured for output! From the
>> manual I understand that if the pin is configured for output, we could
>> either use PIO_SODR/PIO_CODR to set/clear the bits individually or
>> PIO_ODSR for synchronous data output. But than we need to care about the
>> non-block GPIO outputs as well... requiring a read-modify-write cycle :(.
> 
>>>From the manual, I read about OWER: "Enables writing PIO_ODSR for the
> I/O line" (analogous for OWDR). Would interpret this as affecting ODSR
> (for block GPIO) but not SODR/CODR (as currently with single GPIOs).
> 
> Have you tried? ;-)

Grrr, I mixed OER with OWER, sorry for the noise. Back to your approach,
which works.

	/* Do synchronous data output with a single write access */
	__raw_writel(~mask, pio + PIO_OWDR);
	__raw_writel(mask, pio + PIO_OWER);
	__raw_writel(val, pio + PIO_ODSR);

For caching we would need a storage. Not sure if it's worth compared to
a context switch into the kernel.

Wolfgang.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/