lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 4 Jan 2013 11:01:58 +0530
From:	Prashant Gaikwad <pgaikwad@...dia.com>
To:	Stephen Warren <swarren@...dotorg.org>
CC:	"mturquette@...aro.org" <mturquette@...aro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>
Subject: Re: [PATCH v2 05/11] ARM: dt: tegra30: Add device node for APB MISC

On Friday 04 January 2013 10:51 AM, Stephen Warren wrote:
> On 01/03/2013 09:26 PM, Prashant Gaikwad wrote:
>> On Friday 04 January 2013 09:30 AM, Stephen Warren wrote:
>>> On 01/03/2013 08:23 PM, Prashant Gaikwad wrote:
>>>> On Friday 04 January 2013 08:35 AM, Stephen Warren wrote:
>>>>> On 01/03/2013 06:48 PM, Prashant Gaikwad wrote:
>>>>>> On Thursday 03 January 2013 09:41 PM, Stephen Warren wrote:
>>> ...
>>>>>>> OK. It sounds like we need a true APB MISC driver then, to
>>>>>>> abstract the
>>>>>>> differences; the clock driver really shouldn't be touching the APB
>>>>>>> MISC
>>>>>>> registers in all likelihood, unless a subset of the sections you
>>>>>>> mention
>>>>>>> above are truly dedicated to clock functionality.
>>>>>> I don't think it is a good idea to create a driver for APB MISC, all
>>>>>> registers are used by different drivers.
>>>>> Well, it's even worse to have a bunch of other drivers randomly trample
>>>>> on a set of registers they don't own.
>>>>>
>>>>>> Only chip id revision registers are used in clock driver.
>>>>> There are already global variables exposed by the Tegra fuse driver;
>>>>> can
>>>>> you just read those?
>>>> It is not about variables or some value, we have to read some apb
>>>> register to flush the write operation in apb bus before we disable
>>>> peripheral clock.
>>>> We are using chip id revision register for this purpose.
>>> Ah. That's definitely not something the clock driver should be doing
>>> directly. It's probably OK to add a custom Tegra-specific function to
>>> some file in arch/arm/mach-tegra to implement this. Even better would be
>>> a full bus driver for the APB bus, but that's probably too much bloat
>>> for now.
>> tegra_init_fuse in arch/arm/mach-tegra/fuse.c is already reading chip id
>> revision register, so I can implement one function to read this register
>> in fuse.c, which will be used by clock driver and tegra_init_fuse.
>> But then we need to add it to some header file in include/mach or
>> include/linux, where? any suggestion?
> Somewhere other than arch/arm/mach-tega/include/mach/ would be good, so
> we don't have to move it later when we enable multi-platform zImage for
> Tegra. Perhaps include/linux/tegra-soc.h? I guess we could move the
> existing mach/powergate.h contents into that file later too.

include/linux/tegra-soc.h seems fine, I will send updated patch series.


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ