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Message-ID: <107742828.129755.1362562332955.JavaMail.apache@mail81.abv.bg>
Date: Wed, 6 Mar 2013 11:32:12 +0200 (EET)
From: Ивайло Димитров
<freemangordon@....bg>
To: Aaro Koskinen <aaro.koskinen@....fi>
Cc: pdeschrijver@...dia.com, pali.rohar@...il.com, tony@...mide.com,
linux@....linux.org.uk, linux-kernel@...r.kernel.org,
linux-omap@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround
>-------- Оригинално писмо --------
>От: Aaro Koskinen
>Относно: Re: [PATCH] arm: omap: RX-51: ARM errata 430973 workaround
>До: Ивайло Димитров
>Изпратено на: Събота, 2013, Март 2 01:51:39 EET
>
>
>On Fri, Mar 01, 2013 at 12:09:12PM +0200, Ивайло Димитров wrote:
>> Unfortunately it is necessary, on RX-51 PPA/NOLO leaves IBE bit unset.
>
>You sure? I think you need to explain this more - the commit message in
>the original patch is empty/missing...
>
>A.
>
Yes, I am sure, NOLO leaves IBE bit in ACR unset, I've verified that by reading/printing the contents of ACR from both u-boot and the kernel itself. With IBE bit unset, "mcr p15, 0, rX, c7, c5, 6" - flush BTAC/BTB instruction(which is needed to workaround errata 430973) is a noop.
Yes, I am sure, IBE but must be set by using a call to PPA, on RX-51 setting that bit from the kernel (as it is done in the "ARM errata: Stale prediction on replaced interworking branch" kernel patch, see http://kerneltrap.org/mailarchive/git-commits-head/2009/5/3/5622724) does not work, see the comment at the end: "Note that setting specific bits in the ACTLR register may not be available in non-secure mode.". This is exactly the case for RX-51. I've verified that too.
If you need anything else elaborated on, I'm fine, just ask :)
Regards,
Ivo
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