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Message-ID: <513A3113.10909@wwwdotorg.org>
Date: Fri, 08 Mar 2013 11:42:27 -0700
From: Stephen Warren <swarren@...dotorg.org>
To: Laxman Dewangan <ldewangan@...dia.com>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Peter De Schrijver <pdeschrijver@...dia.com>
Subject: Re: [PATCH 4/5] ARM: DT: tegra114: add KBC controller DT entry
On 03/08/2013 11:14 AM, Laxman Dewangan wrote:
> On Friday 08 March 2013 11:34 PM, Stephen Warren wrote:
>> On 03/08/2013 06:53 AM, Laxman Dewangan wrote:
>>> NVIDIA's Tegra114 SoCs have the matrix keyboard controller which
>>> supports 11x8 type of matrix. The number of rows and columns
>>> are configurable.
>> Earlier Tegra versions supported up to a 16x8 matrix. This feeds into
>> the following defines in the driver:
>>
>> #define KBC_MAX_GPIO 24
>> #define KBC_MAX_ROW 16
>> #define KBC_MAX_COL 8
>> #define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
>>
>> Given Tegra114 supports /fewer/ pins and rows than earlier chips, I
>> think that makes the HW technically incompatible, since GPIO IDs 19..23
>> are invalid in this HW but valid earlier.
>>
>> Now in practice I suppose that with a correct DT keyboard map for a
>> Tegra114 device, those extra invalid GPIOs would never be referenced, so
>> this is a little nit-picky, but I still feel we should fix this.
>
> Where do we fix this? In binding document?
In the driver and .dtsi files; the rest of my message was describing how
to fix this.
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