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Date:	Sat, 9 Mar 2013 00:16:24 +0530
From:	Laxman Dewangan <ldewangan@...dia.com>
To:	Stephen Warren <swarren@...dotorg.org>
CC:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Peter De Schrijver <pdeschrijver@...dia.com>
Subject: Re: [PATCH 1/5] ARM: DT: tegra114: add APB DMA controller DT entry

On Saturday 09 March 2013 12:11 AM, Stephen Warren wrote:
> On 03/08/2013 11:06 AM, Laxman Dewangan wrote:
>> On Friday 08 March 2013 11:21 PM, Stephen Warren wrote:
>>> On 03/08/2013 06:52 AM, Laxman Dewangan wrote:
>>>> NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
>>>> APB DMA controllers and make it compatible with
>>>> "nvidia,tegra114-apbdma".
>>>> diff --git a/arch/arm/boot/dts/tegra114.dtsi
>>>> b/arch/arm/boot/dts/tegra114.dtsi
>>>> +    apbdma: dma {
>>>> +        compatible = "nvidia,tegra114-apbdma";
>>> So I know that the Tegra114 HW has a new channel-pause feature, which
>>> the driver /can/ use. However, if the driver didn't know about that
>>> feature, and continued to use the global-pause feature, would it still
>>> work fine?
>>>
>>> In other words, is the Tegra114 HW 100% backwards-compatible with the
>>> Tegra30 HW, it's just that there are new features that SW could
>>> optionally use?
>>>
>>> If that is true, then we should also include "nvidia,tegra30-apbdma" in
>>> the compatible value.
>> Tegra114 HW is not compatible with the tegra30 as with global pause, it
>> is not able to write into the dma register in T114. On t114, the dma
>> register is clock gated with global enable/disable.
> Interesting. In that case, the compatible value above is entirely
> correct. Thanks for the explanation. It might be worth mentioning this
> in the commit description.

I can describe here as I am going to respin the patches anyhow.
However, I have already explain this in the driver commit when porting 
for T114.


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