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Message-ID: <513E1B7E.8090203@nvidia.com> Date: Mon, 11 Mar 2013 23:29:26 +0530 From: Laxman Dewangan <ldewangan@...dia.com> To: Stephen Warren <swarren@...dotorg.org> CC: "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Peter De Schrijver <pdeschrijver@...dia.com> Subject: Re: [PATCH V2 4/5] ARM: DT: tegra114: add KBC controller DT entry On Monday 11 March 2013 11:13 PM, Stephen Warren wrote: > On 03/09/2013 11:11 AM, Laxman Dewangan wrote: >> NVIDIA's Tegra114 SoCs have the matrix keyboard controller which >> supports 11x8 type of matrix. The number of rows and columns >> are configurable. >> >> Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc", >> "nvidia,tegra20-kbc". > I thought the HW really wasn't compatible with Tegra20 due to the > reduced number of rows/columns/pins supported? Hw controller is really compatible. Only thing is that there is no physical pins on SoC for KBC-ROW11 to KBC-ROW15. Because, there is no physical pins for ROW11 to ROW15, we asked to remove programming/reference this rows from TRM of T114 to consistent with SoCs. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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