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Message-ID: <CAL-B5D0JOTBTRhh-i=DkiUjSsid1v408DE5nj_R2qvaHDtEQ=g@mail.gmail.com> Date: Thu, 14 Mar 2013 09:03:53 -0600 From: Myron Stowe <myron.stowe@...il.com> To: Xiangliang Yu <yuxiangl@...vell.com> Cc: Bjorn Helgaas <bhelgaas@...gle.com>, yxlraid <yxlraid@...il.com>, "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: Re: [PATCH 2/2] PCI: fix system hang issue of Marvell SATA host controller On Wed, Mar 13, 2013 at 3:40 AM, Xiangliang Yu <yuxiangl@...vell.com> wrote: > Hi, Bjorn > >> >> > Now, the situation is like this: >> >> > I captured the PCIE trace with analyzer and found that 1st BE is 0x1111 >> >> > when >> >> > accessing IO port space. But 9125 spec has some limitation, and the BE >> >> > must >> >> > be >> >> > 0x0100, to access the 2nd byte only. So, the chip will go to bad. >> >> >> >> Great, this is new, interesting, data. Is the 9125 spec publicly >> >> accessible and/or could you elaborate on the "some limitation" >> >> comment? >> > 9125 spec is publicly accessible. > If you can't see the pic, please open the attachment. Thanks! Neither Bjorn nor myself could see the pic (from the previous thread or this thread's attachment). > > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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