linux-kernel - Re: [PATCHv2 3/3] ARM: Work around faulty ISAR0 register in some Krait CPUs

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Message-ID: <51476103.40901@codeaurora.org>
Date:	Mon, 18 Mar 2013 11:46:27 -0700
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Will Deacon <will.deacon@....com>
CC:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Stepan Moskovchenko <stepanm@...eaurora.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>
Subject: Re: [PATCHv2 3/3] ARM: Work around faulty ISAR0 register in some
 Krait CPUs

On 03/18/13 11:34, Will Deacon wrote:
> On Mon, Mar 18, 2013 at 06:28:57PM +0000, Stephen Boyd wrote:
>> From: Stepan Moskovchenko <stepanm@...eaurora.org>
>>
>> Some early versions of the Krait CPU design incorrectly indicate
>> that they only support the UDIV and SDIV instructions in Thumb
>> mode when they actually support them in ARM and Thumb mode. It
>> seems that these CPUs follow the DDI0406B ARM ARM which has two
>> possible values for the divide instructions field, instead of the
>> DDI0406C document which has three possible values.
>>
>> Work around this problem by checking the MIDR against Krait CPUs
>> with this faulty ISAR0 register and force the hwcaps to indicate
>> support in both modes.
>>
>> Cc: Will Deacon <will.deacon@....com>
>> Signed-off-by: Stepan Moskovchenko <stepanm@...eaurora.org>
>> [sboyd: Rewrote commit text to reflect real reasoning now that
>> 	we autodetect udiv/sdiv]
>> Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
>> ---
>>  arch/arm/mm/proc-v7.S | 15 +++++++++++++++
>>  1 file changed, 15 insertions(+)
> Acked-by: Will Deacon <will.deacon@....com>
>

Thanks. Put all three in the patch tracker.

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