linux-kernel - Re: [PATCH] usb host: Faraday FUSBH200 HCD driver.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <Pine.LNX.4.44L0.1303201024190.1701-100000@iolanthe.rowland.org>
Date:	Wed, 20 Mar 2013 10:26:09 -0400 (EDT)
From:	Alan Stern <stern@...land.harvard.edu>
To:	Yuan-Hsin Chen <yuanlmm@...il.com>
cc:	Felipe Balbi <balbi@...com>, <gregkh@...uxfoundation.org>,
	<sarah.a.sharp@...ux.intel.com>, <Julia.Lawall@...6.fr>,
	<linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	Yuan-Hsin Chen <yhchen@...aday-tech.com>,
	<john453@...aday-tech.com>
Subject: Re: [PATCH] usb host: Faraday FUSBH200 HCD driver.

On Wed, 20 Mar 2013, Yuan-Hsin Chen wrote:

> Hi,
> 
> On Tue, Mar 19, 2013 at 11:48 PM, Alan Stern <stern@...land.harvard.edu> wrote:
> > On Tue, 19 Mar 2013, Yuan-Hsin Chen wrote:
> >
> >> > What about the port_status registers?  They're not between command and
> >> > async_next.  If they aren't consistent with EHCI, it makes things a lot
> >> > more complicated.
> >>
> >> fusbh200 has only one port_status register with different offset,
> >> 0x30, and the position of some bits are different from EHCI.
> 
> How about adding kernel configuration to adjust offset for FUSBH200 in
> ehci_def.h? So port_status would be in offset 0x20 from ehci_regs.
> 
> For example,
> 
>         /* ASYNCLISTADDR: offset 0x18 */
>         u32             async_next;     /* address of next async queue head */
> 
> #ifndef CONFIG_USB_EHCI_HCD_FUSBH200
>         u32             reserved1[2];
> 
>         /* TXFILLTUNING: offset 0x24 */
>         u32             txfill_tuning;  /* TX FIFO Tuning register */
> #define TXFIFO_DEFAULT  (8<<16)         /* FIFO burst threshold 8 */
> 
>         u32             reserved2[6];
> 
>         /* CONFIGFLAG: offset 0x40 */
>         u32             configured_flag;
> #define FLAG_CF         (1<<0)          /* true: we'll support "high speed" */
> 
> #else
>         u32             reserved1;
> #endif
>         /* PORTSC: offset 0x44 */
>         u32             port_status[0]; /* up to N_PORTS */

This is acceptable _only_ if it is not possible to use an FUSBH200 
controller in the same computer as a normal EHCI controller.

> Furthermore, there are PORT_POWER, PORT_OWNER, PORT_LED_XXX,
> PORT_TEST, PORT_WKCONN_E, PORT_WKDISC_E, PORT_WKOC_E absent in
> port_status of FUSBH200. Also PORT_OC and PORT_OCC are in another
> register. Is it ok to use quirk flag also?

Yes, those can be handled by a quirk flag.  Does the FUSBH200 have a 
built-in Transaction Translator?

Alan Stern

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/