linux-kernel - Re: [PATCH RESEND 0/3] perf, amd: Support for Family 16h L2I Performance Counters

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Date:	Wed, 10 Apr 2013 11:48:07 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Jacob Shin <jacob.shin@....com>
Cc:	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	"H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
	Stephane Eranian <eranian@...gle.com>,
	Jiri Olsa <jolsa@...hat.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND 0/3] perf, amd: Support for Family 16h L2I
 Performance Counters

On Wed, 2013-04-10 at 11:41 +0200, Peter Zijlstra wrote:
> On Tue, 2013-04-09 at 10:23 -0500, Jacob Shin wrote:
> > Upcoming AMD Family 16h Processors provide 4 new performance counters
> > to count L2 related events. Similar to northbridge counters, these new
> > counters are shared across multiple CPUs that share the same L2 cache.
> > This patchset adds support for these new counters and enforces sharing
> > by leveraging the existing sharing logic used for the northbridge
> > counters.
> 
> If they're separate counters -- not shared with the regular cpu
> counters like the 10h NB counters are, then they should have their own
> PMU driver.
> 
> Similar to the 15h NB counters; which are a separate set of counters
> and no longer overlay the normal counters.

Related; where's the 16h BKDG?

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