linux-kernel - Re: [PATCH] x86: make IDT read-only

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Message-ID: <20130410095716.GF24443@gmail.com>
Date:	Wed, 10 Apr 2013 11:57:16 +0200
From:	Ingo Molnar <mingo@...nel.org>
To:	"Eric W. Biederman" <ebiederm@...ssion.com>
Cc:	"H. Peter Anvin" <hpa@...or.com>,
	Kees Cook <keescook@...omium.org>,
	Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
	Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	Jeremy Fitzhardinge <jeremy@...p.org>,
	Marcelo Tosatti <mtosatti@...hat.com>,
	Alex Shi <alex.shi@...el.com>,
	Borislav Petkov <borislav.petkov@....com>,
	Alexander Duyck <alexander.h.duyck@...el.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Steven Rostedt <rostedt@...dmis.org>,
	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
	xen-devel@...ts.xensource.com,
	virtualization@...ts.linux-foundation.org,
	kernel-hardening@...ts.openwall.com,
	Dan Rosenberg <drosenberg@...curity.com>,
	Julien Tinnes <jln@...gle.com>, Will Drewry <wad@...omium.org>,
	Eric Northup <digitaleric@...gle.com>
Subject: Re: [PATCH] x86: make IDT read-only


* Eric W. Biederman <ebiederm@...ssion.com> wrote:

> "H. Peter Anvin" <hpa@...or.com> writes:
> 
> > On 04/08/2013 03:43 PM, Kees Cook wrote:
> >> This makes the IDT unconditionally read-only. This primarily removes
> >> the IDT from being a target for arbitrary memory write attacks. It has
> >> an added benefit of also not leaking (via the "sidt" instruction) the
> >> kernel base offset, if it has been relocated.
> >> 
> >> Signed-off-by: Kees Cook <keescook@...omium.org>
> >> Cc: Eric Northup <digitaleric@...gle.com>
> >
> > Also, tglx: does this interfere with your per-cpu IDT efforts?
> 
> Given that we don't change any IDT entries why would anyone want a
> per-cpu IDT?  The cache lines should easily be shared accross all
> processors.

That's true iif they are cached.

If not then it's a remote DRAM access cache miss for all CPUs except the node that 
holds that memory.

> Or are there some giant NUMA machines that trigger cache misses when accessing 
> the IDT and the penalty for pulling the cache line across the NUMA fabric is 
> prohibitive?

IDT accesses for pure userspace execution are pretty rare. So we are not just 
talking about huge NUMA machines here but about ordinary NUMA machines taking a 
remote cache miss hit for the first IRQ or other IDT-accessing operation they do 
after some cache-intense user-space processing.

It's a small effect, but it exists and improving it would be legitimate.

Thanks,

	Ingo
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