linux-kernel - Re: [PATCH] x86: Add check for P5 to microcode_intel

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Message-ID: <2cca7cab-e8b2-41fc-b757-22f37b78f99b@email.android.com>
Date:	Sat, 20 Apr 2013 08:52:55 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	"Bryan O'Donoghue" <bryan.odonoghue.lkml@...us-software.ie>
CC:	Borislav Petkov <bp@...en8.de>, linux-kernel@...r.kernel.org,
	x86@...nel.org, fenghua.yu@...el.com
Subject: Re: [PATCH] x86: Add check for P5 to microcode_intel_early

I committed my own patch yesterday; at this point it would be most helpful if you could test it out to make sure it works as it should...

Bryan O'Donoghue <bryan.odonoghue.lkml@...us-software.ie> wrote:

>On 20/04/13 00:13, H. Peter Anvin wrote:
>> On 04/19/2013 02:44 PM, Bryan O'Donoghue wrote:
>>> On 19/04/13 22:25, Borislav Petkov wrote:
>>>> On Fri, Apr 19, 2013 at 10:55:15PM +0200, Borislav Petkov wrote:
>>>>> Just filter out P5 and earlier. The code already does that for
>CPUs
>>>>> which don't have CPUID.
>>>>
>>>> Actually, an alternative - more practical albeit not very accurate
>>>
>>> More practical ? Hmm - the MSRs don't exist for<  P5
>>>
>>>> solution would be to check for which families Intel delivers
>microcode
>>>> and do the cut off there with a comment as to why you do it like
>>>> that.void
>>>
>>> You mean return !intel so this function will never be called.
>>>
>>> __init load_ucode_bsp(void)
>>> {
>>>          int vendor = x86_vendor();
>>>
>>>          if (vendor == X86_VENDOR_INTEL)
>>>                  load_ucode_intel_bsp();
>>> }
>>>
>>> Ah yes. That would work and be less code.
>>>
>>> We should do it that way.
>>
>> Do you think you can have a patch for me in the next few hours?
>
>Sure.
>
>I'm in Ireland (sleeping @ 00:15 on a Friday night sadly).
>
>Give me ~ 40 minutes

-- 
Sent from my mobile phone. Please excuse brevity and lack of formatting.
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