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Message-ID: <20130423095437.GD17593@mudshark.cambridge.arm.com>
Date: Tue, 23 Apr 2013 10:54:37 +0100
From: Will Deacon <will.deacon@....com>
To: Jacob Shin <jacob.shin@....com>
Cc: Ingo Molnar <mingo@...hat.com>, Oleg Nesterov <oleg@...hat.com>,
Frederic Weisbecker <fweisbec@...il.com>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
"x86@...nel.org" <x86@...nel.org>,
Stephane Eranian <eranian@...gle.com>,
Jiri Olsa <jolsa@...hat.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 1/4] perf: Add hardware breakpoint address mask
Hi Jacob,
On Tue, Apr 23, 2013 at 08:57:02AM +0100, Jacob Shin wrote:
> Some architectures (for us, AMD Family 16h) allow for "don't care" bit
> mask to further qualify a hardware breakpoint address, in order to
> trap on range of addresses. Update perf uapi to add bp_addr_mask field.
arm and arm64 have a similar feature to this, whereby we currently have to
translate the bp_len field into a mask, which is all the hardware
understands. Unlike what you describe, our mask indicates the bytes we *are*
interested in, but I think we could make use of the same functionality that
you're introducing here.
There are some funky restrictions on the alignment of the base address, but
we can detect those and tell userspace where to go if it tries any funny
stuff.
Can you see a problem if I simply invert the mask?
Will
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