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Message-ID: <1368619917.15764.99.camel@sauron.fi.intel.com>
Date:	Wed, 15 May 2013 15:11:57 +0300
From:	Artem Bityutskiy <dedekind1@...il.com>
To:	Huang Shijie <b32955@...escale.com>
Cc:	dwmw2@...radead.org, computersforpeace@...il.com,
	linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 01/11] mtd: add datasheet's ECC information to
 nand_chip{}

On Wed, 2013-05-15 at 16:40 +0800, Huang Shijie wrote:
> + * @ecc_strength:	[INTERN] ECC correctability from the datasheet.
> + *			Minimum amount of bit errors per @ecc_step guaranteed to
> + *			be correctable. If unknown, set to zero.
> + * @ecc_step:		[INTERN] ECC step required by the @ecc_strength,
> + *                      also from the datasheet. It is the recommended ECC step
> + *			size, if known; if unknown, set to zero.

Here and in other places you talk about "datasheet". Do you assume that
the real ECC strength/step used by NAND chips may be different? Or you
assume it must be the same?

-- 
Best Regards,
Artem Bityutskiy

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