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Message-Id: <347F9A91-70C0-4CD4-B0F6-C5E1DB0C3784@gmail.com>
Date: Tue, 4 Jun 2013 19:37:47 +1000
From: Daniel Tang <dt.tangr@...il.com>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Thomas Gleixner <tglx@...utronix.de>,
John Stultz <john.stultz@...aro.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>
Subject: Re: [PATCHv2] Add TI-Nspire timer support
On 04/06/2013, at 7:36 PM, Linus Walleij <linus.walleij@...aro.org> wrote:
> On Sat, Jun 1, 2013 at 8:02 AM, Daniel Tang <dt.tangr@...il.com> wrote:
>
>> The interrupt acknowledgement mechanism is a little strange because the interrupt mask and acknowledge registers are located in another memory mapped I/O peripheral. The address of this register is passed to the driver through device tree bindings.
>
> I can't see any linebreaks there. This looks horrible in git log.
>
> But I guess Daniel can fix it up directly in his tree.
>
Apologies, I can fix it up if it needs be.
> Yours,
> Linus Walleij
Cheers,
Daniel Tang--
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