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Message-ID: <51ADCE73.3060802@linaro.org> Date: Tue, 04 Jun 2013 13:24:35 +0200 From: Daniel Lezcano <daniel.lezcano@...aro.org> To: Daniel Tang <dt.tangr@...il.com> CC: Linus Walleij <linus.walleij@...aro.org>, Thomas Gleixner <tglx@...utronix.de>, John Stultz <john.stultz@...aro.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: Re: [PATCHv2] Add TI-Nspire timer support On 06/04/2013 11:37 AM, Daniel Tang wrote: > > On 04/06/2013, at 7:36 PM, Linus Walleij <linus.walleij@...aro.org> wrote: > >> On Sat, Jun 1, 2013 at 8:02 AM, Daniel Tang <dt.tangr@...il.com> wrote: >> >>> The interrupt acknowledgement mechanism is a little strange because the interrupt mask and acknowledge registers are located in another memory mapped I/O peripheral. The address of this register is passed to the driver through device tree bindings. >> >> I can't see any linebreaks there. This looks horrible in git log. >> >> But I guess Daniel can fix it up directly in his tree. >> > > Apologies, I can fix it up if it needs be. It is ok, I already fixed it. Thanks -- Daniel -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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