linux-kernel - Re: [PATCH v2 2/4] tty/8250_dw: Add support for OCTEON UARTS.

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Message-ID: <20130620082900.GB32331@xps8300>
Date:	Thu, 20 Jun 2013 11:29:00 +0300
From:	Heikki Krogerus <heikki.krogerus@...ux.intel.com>
To:	David Daney <ddaney.cavm@...il.com>
Cc:	linux-mips@...ux-mips.org, ralf@...ux-mips.org,
	Jamie Iles <jamie@...ieiles.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jslaby@...e.cz>, linux-serial@...r.kernel.org,
	linux-kernel@...r.kernel.org, David Daney <david.daney@...ium.com>,
	Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH v2 2/4] tty/8250_dw: Add support for OCTEON UARTS.

On Wed, Jun 19, 2013 at 02:37:27PM -0700, David Daney wrote:
> From: David Daney <david.daney@...ium.com>
> 
> A few differences needed by OCTEON:
> 
> o These are DWC UARTS, but have USR at a different offset.
> 
> o Internal SoC buses require reading back from registers to maintain
>   write ordering.
> 
> o 8250 on OCTEON appears with 64-bit wide registers, so when using
>   readb/writeb in big endian mode we have to adjust the membase to hit
>   the proper part of the register.
> 
> o No UCV register, so we hard code some properties.
> 
> Because OCTEON doesn't have a UCV register, I change where
> dw8250_setup_port(), which reads the UCV, is called by pushing it in
> to the OF and ACPI probe functions, and move unchanged
> dw8250_setup_port() earlier in the file.
> 
> Signed-off-by: David Daney <david.daney@...ium.com>
> Acked-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> Cc: Arnd Bergmann <arnd@...db.de>
> Cc: Heikki Krogerus <heikki.krogerus@...ux.intel.com>

Reviewed-by: Heikki Krogerus <heikki.krogerus@...ux.intel.com>

-- 
heikki
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