linux-kernel - Re: [PATCH V9 1/4] pci: Add PCIe driver for Samsung Exynos

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Date:	Fri, 21 Jun 2013 09:40:48 +0530
From:	Sachin Kamat <sachin.kamat@...aro.org>
To:	Jingoo Han <jg1.han@...sung.com>
Cc:	Kukjin Kim <kgene.kim@...sung.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	linux-samsung-soc@...r.kernel.org, linux-pci@...r.kernel.org,
	devicetree-discuss@...ts.ozlabs.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Grant Likely <grant.likely@...retlab.ca>,
	Andrew Murray <andrew.murray@....com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Thierry Reding <thierry.reding@...onic-design.de>,
	Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
	Arnd Bergmann <arnd@...db.de>,
	Surendranath Gurivireddy Balla <suren.reddy@...sung.com>,
	Siva Reddy Kallam <siva.kallam@...sung.com>,
	Thomas Abraham <thomas.abraham@...aro.org>,
	Tomasz Figa <t.figa@...sung.com>,
	Pratyush Anand <pratyush.anand@...com>,
	Mohit KUMAR <Mohit.KUMAR@...com>
Subject: Re: [PATCH V9 1/4] pci: Add PCIe driver for Samsung Exynos

Hi Jingoo,

Some small corrections inline.

On 21 June 2013 08:51, Jingoo Han <jg1.han@...sung.com> wrote:
> Exynos5440 has a PCIe controller which can be used as Root Complex.
> This driver supports a PCIe controller as Root Complex mode.
>
> Signed-off-by: Surendranath Gurivireddy Balla <suren.reddy@...sung.com>
> Signed-off-by: Siva Reddy Kallam <siva.kallam@...sung.com>
> Signed-off-by: Jingoo Han <jg1.han@...sung.com>
> Acked-by: Arnd Bergmann <arnd@...db.de>
> ---
>  .../devicetree/bindings/pci/designware-pcie.txt    |   73 ++
>  drivers/pci/host/Kconfig                           |    9 +
>  drivers/pci/host/Makefile                          |    1 +
>  drivers/pci/host/pci-designware.c                  | 1057 ++++++++++++++++++++
>  4 files changed, 1140 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/designware-pcie.txt
>  create mode 100644 drivers/pci/host/pci-designware.c
>
> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> new file mode 100644
> index 0000000..e4681e6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> @@ -0,0 +1,73 @@
> +* Synopsis Designware PCIe interface
> +
> +Required properties:
> +-compatible: should contain "snps,dw-pcie" to identify the
> +       core, plus an identifier for the specific instance, such
> +       as "samsung,exynos5440-pcie".
> +-reg: base addresses and lengths of the pcie conteroller,

s/conteroller/controller

> +       the phy controller, additional register for the phy controller.
> +- interrupts: interrupt values for level interrupt,
> +       pulse interrupt, special interrupt.
> +- clocks: from common clock binding: handle to pci clock.
> +- clock-names: from common clock binding: Shall be "pcie", "pcie_bus".

s/Shall be .../should be "pcie" and "pcie_bus".

[snip]

> +
> +MODULE_AUTHOR("Jingoo Han <jg1.han@...sung.com>");
> +MODULE_DESCRIPTION("Samsung PCIe host controller driver");
> +MODULE_LICENSE("GPLv2");

I think this should be "GPL v2"  (with a space between GPL and v2).


-- 
With warm regards,
Sachin
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