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Message-ID: <51DF1B3C.8040603@linux.intel.com>
Date: Thu, 11 Jul 2013 13:53:16 -0700
From: "H. Peter Anvin" <hpa@...ux.intel.com>
To: Jiri Kosina <jkosina@...e.cz>
CC: Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>,
Steven Rostedt <rostedt@...dmis.org>,
Jason Baron <jbaron@...mai.com>,
Borislav Petkov <bp@...en8.de>, Joe Perches <joe@...ches.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2 v3] x86: introduce int3-based instruction patching
On 07/11/2013 01:26 PM, Jiri Kosina wrote:
>
> synchronization after replacing "all but first" instructions should not
> be necessary (on Intel hardware), as the syncing after the subsequent
> patching of the first byte provides enough safety.
> But there's not only Intel HW out there, and we'd rather be on a safe
> side.
>
Has anyone talked to AMD or VIA about this at all? Did anyone else ever
make SMP-capable x86?
-hpa
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