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Message-ID: <20130724061626.GA18995@gchen.bj.intel.com>
Date:	Wed, 24 Jul 2013 02:16:26 -0400
From:	Chen Gong <gong.chen@...ux.intel.com>
To:	Tony Luck <tony.luck@...il.com>
Cc:	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Borislav Petkov <bp@...e.de>,
	"Naveen N. Rao" <naveen.n.rao@...ux.vnet.ibm.com>
Subject: Re: [PATCH] x86/mce: Pay no attention to 'F' bit in MCACOD when
 parsing 'UC' errors.

On Tue, Jul 23, 2013 at 03:51:14PM -0700, Tony Luck wrote:
> Date: Tue, 23 Jul 2013 15:51:14 -0700
> From: Tony Luck <tony.luck@...il.com>
> To: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
> Cc: Borislav Petkov <bp@...e.de>, Chen Gong <gong.chen@...ux.intel.com>,
>  "Naveen N. Rao" <naveen.n.rao@...ux.vnet.ibm.com>
> Subject: Re: [PATCH] x86/mce: Pay no attention to 'F' bit in MCACOD when
>  parsing 'UC' errors.
> 
> Gah ... there is another bug in that unaffected thread entry.  The check for
> MCG_STATUS should be for RIPV=1 *and* EIPV=0
> 

I set "MCGMASK(MCG_STATUS_RIPV, MCG_STATUS_RIPV)" becase
I want it to cover Non-Affected Logical Processors (1,0)
and Affected Logical Processor/Recoverable continuable (1,1).

I think both of them are continuable so they should be as
*KEEP*.

> gmail will mess this patch up ... but should still be readable.
> 
> -Tony
> 
> ---
> 
> diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c
> b/arch/x86/kernel/cpu/mcheck/mce-severity
> index 7f6ab4e..48f0fd2 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
> @@ -112,7 +112,7 @@ static struct severity {
>         MCESEV(
>                 KEEP, "Action required but unaffected thread is continuable",
>                 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR,
> MCI_UC_SAR|MCI_ADDR),
> -               MCGMASK(MCG_STATUS_RIPV, MCG_STATUS_RIPV)
> +               MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, MCG_STATUS_RIPV)
>                 ),
>         MCESEV(
>                 AR, "Action required: data load error in a user process",

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